The E1 attachment can be used to network systems directly, over DSL modem or other transmission technology.
The E1 attachment can only be used in combination with the carrier card 4FTR or the LCPU. The 4FTR can accept up to four attachments and the LCPU one attachment. In addition to E1 attachments also S0 and UART attachments can be used with the 4FTR. The combinations can be freely arranged.
At a Glance:
- 2 MBit/s interface
- 2 switchable control channels
- Clock extraction
- Up to 30 user channels (PCM)
Front and rear side E1 attachment (L- No. 2.861)
The following block diagram illustrates the general mode of operation of the E1 attachment for the 4FTR or LCPU.
Block diagram E1
The E1 transceiver chip on the E1 attachment is clocked with 20 MHz. The microprocessor regulates communication with the DVS-21 and the control of the display LEDs.
The DVS-21s’ own control information (lines, intercom/PA, low frequency (LF) control) is exchanged bidirectionally between μ-processor and BusCPU of the carrier card.
The LF wanted signals are managed by the PCM bus (STI, STO, FRM and CLK).
A 2 MBit/s (HDB3) interface forms the connection to the outside world with 30 user channels and 2 control channels according to ETSI ETS 300 011, ETS 300 166, and ETS 300 233. The control data can be transmitted to the remote DVS-21 system over one of two time slots, channel 0 (with 4/5 S-bits) or channel 16 (free signal channel).
In the ICS software a selection can be made which time slot will contain the control data.
For transmission we differentiate between transparent and framed transmission.
As a rule one of the three following enabling variations is used:
Variation 1: Transmission Using Non-transparent Systems
The signal channel 0 (ZK0) of DVS-21 is transferred in the multiplexer (e.g. XMP1) to e.g. signal channel 16 (ZK16).
Frame recognition of the DVS-21 is not transferred with it. The transmission technology uses its own frame recognition.
For the DVS-21 the transfer is virtually transparent.
Signal channel 0 (DVS-21) transferred to channel 16 (PDH-MUX)
Variation 2: Transmission Using Non-transparent Systems
To transmit the control data, now the ZK16 of the DVS-21 is directly used.
ZK0 and hence the frame recognition of the DVS-21 is not transferred with it.
As in variation 1 the transmission technology uses its own frames.
Use of the signal channels is not necessary.
Channel 16 of the (DVS-21) is used as signalling channel
Variation 3: Transmission Using Transparent Systems
The 32 PCM channels of the E1 attachment of the DVS-21 are forwarded transparently without being altered (e.g. radio relay, Modem, MS1/4, ...).
The use of ZK0 or ZK16 to signal is arbitrary.
Transparent transmission using radio relay system
If one connects independent systems over E1, transmission errors are to be expected because of the unsynchronized clocking. An input buffer on the E1 attachments establishes a controlled frame slip. This results in loss of a sampled value and goes unnoticed in purely voice applications.
Control data is reconstructed by the data link layer.
To optimize the system performance synchronization should be done if possible.
Synchronization is done by the CPU1.
The DVS-21 can be combined together into a group in various ways.
DVS-21 master / slave operation
Clock extraction from transmission network (e.g. railway network). All devices are in slave mode
Multiple DVS-21 systems are combined into a group. Here one system must be designated as master to which the others synchronize.
Synchronize external clock (T3)
Clock extraction from a DVS-21. One device is master, the others are in slave mode.
Two DVS-21 systems are combined together over e.g. a multiplexer (e.g. XMP1) over a transmitting network. The devices synchronize to the external clock T3.
SDH/PDH master / DVS-21 slave operation
Clock extraction from a DVS-21. One device is master, the others are in slave mode
Two DVS-21 systems are combined together over a modem line and an XMP1. One DVS-21 generates the clock signal to which the XMP1 and the second DVS-21 synchronize.
The clocking concept is controlled by the CPU1 in each DVS-21. In order for the system to synchronize to an external clock signal or an HDB3 signal all that is required is a jumper on the backplane.
The Symbols on the Front Plate and their Meaning (4FTR / LCPU):
|The System Blinker
Addressing from processor taking place
BUS output works as push-push operation with the system blinker
BUS input works as push-pull operation with the system blinker
|On||LF Connection Established
A minimum of one of 30 possible LF connections has been established (card set related display)
|Al||No Receiver Found (No Connection)
(card set related display)
|Receiving: Data Frame to E1 Interface
(card set related display)
|Sending: Data Frame from E1 Interface
(card set related display)
|Operating Voltage:||+/-5 V (control)|
|Idle Current (48V):||19 mA / E1|
|Idle Current (+5V):||115 mA / per E1|
|Idle Current (-5V):||0 mA|
|Operational Current (+5V):||118 mA / per E1|
|Operational Current (-5V):||0 mA|
|Interface:||2 MBit/s (HDB3 code according to G.703) with 30 PCM user channels and 2 HDLC control channels|
|Standtarts:||ETSI ETS 300 011, ETS 300 166, ETS 300 233|
|Temperature Range:||0 °C to 45 °C|
|Weight (4FTR/LCPU):||155 g|
|Weight (E1 attachment):||20 g per attachment|
|Installation Height (4FTR/LCPU):||3HE|
|Installation Width (4FTR/LCPU):||6TE|
|Dimensions (E1 Attachment):||34 mm x 80 mm (height x width)|
|Number of Attachments:||Up to 4/1 attachments per 4FTR/LCPU|